Asynchronous Transfer Mode (ATM) is a technique of transmitting, multiplexing, switching, and receiving information in a network. ATM provides a high-speed, low-delay network that supports any type of user traffic, such as data, image, video, and voice. ATM segments and multiplexes user traffic into small, fixed-length units called cells. The cell is transmitted as 53-bytes, with 5 bytes reserved for the cell header. Each cell is identified with virtual circuit identifiers that are contained in the cell header. An ATM network uses these identifiers to relay the traffic through high-speed switches.
The lowest layer of the ATM model is the physical layer. The physical layer is concerned with functions that are dependent on the physical medium itself. Basically, the physical layer sends and receives cells on a physical line. The physical layer provides mapping of ATM cells to a physical line. The physical layer devices can be either single chips or system level board designs.
The ATM layer resides on top of the physical layer of a conventional layered network protocol suite, but it does not require the use of a specific physical layer protocol. The ATM layer processes the user traffic contained in the cells. Incoming virtual circuit identifiers on a link are sent to the proper output link by the ATM layer. Also, the cell headers are generated and interpreted by the ATM layer. Only the upper layers of the ATM Model process the user traffic. The ATM layer is typically a single chip or system on a board.
The ATM Forum defines a specification for the protocol of transferring ATM cells between Physical layer and ATM layer devices. The specification is known as UTOPIA (Universal Test and Operations Physical Interface) for ATM. UTOPIA was proposed to standardize the interface between the various layers of the ATM architecture itself. In particular, the UTOPIA level 2 specification defines a protocol for a single ATM layer device to communicate with multiple Physical layer devices with respect to a 50 MHz clock. The UTOPIA level 2 specification defines that a total of 31 Physical layer devices may be connected to a single ATM layer device.
Typically, system printed circuit boards have dimensions that do not easily accommodate 31 Physical devices and support hardware. The typical solution is to partition devices onto several boards connected by a backplane. A problem then arises when using multiple Physical layer devices with respect to a 50 MHz signal. It is difficult to maintain signal integrity over a 50 MHz multi-access bus.
The UTOPIA level 2 standard defines the data line and protocol signals between chips, it does not define the specific physical connections between chips. Smaller systems may implement an entire system on a single printed circuit board with different components communicating with one another via bus traces on the printed circuit board. In this case, it may be possible to implement the UTOPIA level 2 interface in a straightforward manner, without much modification to account for the physical requirements of the printed circuit board traces.
However, in many larger ATM switches, it may be desirable to construct a switch out of a number of separate printed circuit boards. In such a case, a standard way for multiple printed circuit boards to communicate with one another would be through use of a backplane, as is known in the art. A problem arises in attempting to use an UTOPIA level 2 interface on a backplane in that, at the 50 MHz frequency specified in an UTOPIA level 2 interface, trace lengths and capacitance are very large factors affecting the integrity of signals on backplane wires. Therefore, a straightforward adaptation of UTOPIA level 2 interface onto a backplane will in many cases not provide adequate performance in a high performance ATM system. Electromagnetic signal theory dictates that a 50 MHz trace length and capacitance become large factors in maintaining the shape and integrity of signals. At 25 MHz, the trace length and capacitance become less of a factor making backplane designs much easier. However, when using a 25 MHz clock, there is a division of bandwidth.
Ideally, what is needed is a method and apparatus for allowing up to 31 Physical layer devices to be connected to one ATM layer device utilizing full bandwidth. Also, a method and apparatus capable of providing a simplified but standardized backplane interface for UTOPIA level 2 or similar bus interface standards.